Yuan LI
Profile
Biography
Before joining SIT, Dr. Li got his Ph.D. in computer engineering from The Geroge Washington University, M.S. in microelectronics from the University of Newcastle upon Tyne, and B.S. in physics from the University of Science and Technology of China. His research interest focuses on developing efficient and flexible communication fabrics for heterogeneous manycores, domain-specific accelerators, and chiplet-based systems by incorporating network architecture innovations and emerging interconnect technologies. I currently serve as an Associate Editor for IEEE Transactions on Sustainable Computing.
SIT Appointments
- Assistant Professor– Present
Education
- Ph.D. in Computer EngineeringThe George Washington University , United States
- M.S. in MicroelectronicsUniversity of Newcastle upon Tyne , United Kingdom
- B.S. in PhysicsUniversity of Science and Technology of China , China
Research
Research Interests
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AI/ML Hardware Accelerator
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Heterogeneous Manycore Architecture
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On-Chip Interconnection Network
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Chiplet-based Heterogeneous Integration
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Silicon Photonics
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Non-Volatile Memory
Publication
Journal Papers
Yuan Li, Ahmed Louri, and Avinash Karanth. "MERIT: A Sustainable DNN Accelerator Design with Photonic Phase-Change Memory." in IEEE Transactions on Sustainable Computing (TSUSC), early access, pp. 1-12, December 2024.
Yuan Li, Ahmed Louri, and Avinash Karanth. "A High-Performance and Energy-Efficient Photonic Architecture for Multi-DNN Acceleration." in IEEE Transactions on Parallel and Distributed Systems (TPDS), vol. 35, no. 1, pp. 46-58, January 2024.
Yuan Li, Ahmed Louri, and Avinash Karanth. "SPRINT: A High-Performance, Energy-Efficient, and Scalable Chiplet-based Accelerator with Photonic Interconnects for CNN Inference." in IEEE Transactions on Parallel and Distributed Systems (TPDS), vol. 33, no. 10, pp. 2332-2345, October 2022.
Ke Wang, Hao Zheng, Yuan Li, and Ahmed Louri. "SecureNoC: A Learning-Enabled, High-Performance, and Secure On-Chip Communication Framework Design." in IEEE Transactions on Sustainable Computing (TSUSC), vol. 7, no. 3, pp. 709-723, July 2022.
Yuan Li, Ke Wang, Hao Zheng, Ahmed Louri, and Avinash Karanth. "ASCEND: A Scalable and Energy-Efficient Deep Neural Network Accelerator with Photonic Interconnects." in IEEE Transactions on Circuits and System I (TCAS-I), vol. 69, no. 7, pp. 2730-2741, July 2022.
Yuan Li and Ahmed Louri. "ALPHA: A Learning-Enabled High-Performance Network-on-Chip Router Design for Heterogeneous Manycore Architectures." in IEEE Transactions on Sustainable Computing (TSUSC), vol. 6, no. 2, pp. 274-288, April 2021.
Conferences
Yuan Li, Ahmed Louri, and Avinash Karanth. "A Silicon Photonic Multi-DNN Accelerator." in Proceedings of the International Conference on Parallel Architectures and Compilation Techniques (PACT), pp. 238-249, Vienna, Austria, October 21-25, 2023.
Yuan Li, Ahmed Louri, and Avinash Karanth. "Efficient Multicast Communication in Silicon Photonics Enhanced DNN Acceleration." in Proceedings of the IEEE Photonics Summer Topicals Meeting Series (SUM), pp. 1-2, Sicily, Italy, July 17-19, 2023.
Yuan Li, Ahmed Louri, and Avinash Karanth. "SPACX: Silicon Photonics-based Chiplet Accelerator for DNN Inference." in Proceedings of the IEEE International Symposium on High-Performance Computer Architecture (HPCA), pp. 831-845, Seoul, Korea, April 2-6, 2022.
Ke Wang, Hao Zheng, Yuan Li, Jiajun Li, and Ahmed Louri. "AGAPE: Anomaly Detection with Generative Adversarial Network for Improved Performance, Energy, and Security in Manycore Systems." in Proceedings of the Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 849-854, Antwerp, Belgium, March 14-23, 2022.
Yuan Li, Ahmed Louri, and Avinash Karanth. "Scaling Deep Learning Inference with Chiplet-based Architecture and Photonic Interconnects." in Proceedings of the ACM/IEEE Design Automation Conference (DAC), pp. 931-936, San Francisco, CA, USA, December 5-9, 2021.